• ±â¼ú°ú Á¶È­¸¦ ÀÌ·é ¼³°è´Â Turnaround TimeÀ» ÁÙÀÌ°í ¼öÀ²À» ³ôÀ̴µ¥ Áß¿äÇÑ ¿ä¼Ò·Î ÀÛ¿ëÇÕ´Ï´Ù. High Density Logic ¼³°è´Â ÄÄÇ»ÅͷΠ󸮵ǰí, ¾÷°è Ç¥ÁØÀÌ ÀÖÀ¸¸ç, ¼öÁ÷À¸·Î ³ª´µ°í, Open ToolÀÇ Æ¯¼ºÀÇ Áö´Ï°í ÀÖ¾î Analog & Powerº¸´Ù ¼³°èº¸´Ù ¿ëÀÌÇÕ´Ï´Ù. ¹Ý¸é, Analog & Power ¼³°è´Â ¼³°èÀÚ ÀÇÁ¸ÀûÀ̰í, °í°´ ¸ÂÃãÇüÀ¸·Î Á¦°øµÇ¸ç, ¼öÁ÷À¸·Î ÅëÇյǾî ÀÖ°í, Closed ToolÀÇ Æ¯¼ºÀÌ ÀÖ¾î ¼³°èÀÚ Ä£È­ÀûÀÎ Human Interface¸¦ ÇÊ¿ä·Î ÇÕ´Ï´Ù. ¸Å±×³ªÄ¨Àº ¼³°èÀÚ Ä£È­ÀûÀÎ Interface¸¦ ÅëÇØ ±â¼ú°ú Á¶È­¸¦ ÀÌ·é ¼³°è¸¦ Á¦°øÇϰí ÀÖÀ¸¸ç, ÀÌ Á¡ÀÌ ¹Ù·Î Analog & Power Technology Foundry ºÐ¾ß¿¡¼­ ¸Å±×³ªÄ¨ÀÇ °­Á¡À¸·Î Æò°¡ ¹Þ°í ÀÖ½À´Ï´Ù.
    High Density, Low Power Library
    Synthesis Optimized Cell Set
    D/K for Diversity EDA Tools
    SRAM / ROM Compiler

    Analog & Power Dedicated IP
    Design Guidelines
    ESD Guidelines
    Specialized I/O

    Inline & Staggered Type
    Silicon Proved (ESD & L-U)
    D/K for Diversity EDA Tools
    Circuit under Pad
    Mixed Signal, RF, HV
    Tightly integrated
    Cadence Design Environment